Andrew Bardsley, Luis Tarazona and Doug Edwards
This paper describes a new target component set and synthesis scheme for the Balsa asynchronous hardware description language. This new scheme removes the reliance on precise handshake interleaving and enclosure by separating out control "go" and "done" signalling into separate channels rather than using different phases of the asynchronous handshake. This leads to circuits in which optimisation and control overhead mitigation can be carried out by merging/separating control and data channels and by introducing handshake-decoupling latches. This work aims to make Balsa descriptions implementable in the more widely used and understood higher performance token-based asynchronous circuit styles.