School of Computer Science Intranet
AUTHORS L.A. Plana, P.A. Riocreux, W.J. Bainbridge
SPA is a synthesised, self-timed, ARM-compatible processor core designed for use in security-sensitive applications. It was incorporated in an experimental smartcard chip which is being used to evaluate the applicability of self-timed logic in secure devices. The system-on-chip was synthesised using the Balsa synthesis system with only a small amount of hand design employed to boost the throughput of the on-chip interconnect. The use of synthesis was mandated by a need for rapid implementation and Balsa proved to be very effective: SPA required only 25% of the design effort of earlier non-synthesised Amulets. Balsa was modified to generate circuits with enhanced security against non-invasive attacks. Initial analyses indicate that the secure SPA achieved up to 80% improvement in resistance against non-invasive attacks albeit at the cost of reduced performance and increased area and power consumption.